FREESCALE Recruits Freshers Jobs: DFT Design Engineer @ Bangalore
Job Posted Date: 2012-12-12 |
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Company Freescale Semiconductor
Job Role: DFT Design Engineer
Job Summary :
Participate in definition and driving both chip level and block level design-for-test methodology for SOC designs.
Responsible for Automatic Test Pattern Generation and model creation, memory Built In Self Test, Embedded Deterministic Test and converting scan patterns to tester format.
Responsible for scan pattern simulation based on timing files and gate-level netlist, assisted backend engineer with scan chain insertion and timing analysis.
Work closely with design engineer for design optimization for test coverage improvement, test volume and test time reduction.
Work closely with product and test engineers to debug and solve scan pattern failures in tester.
Work as a global team to do complex SOC design and test based on embedded MCU. Note: Submit Your Resume |
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